1. Field
The present invention relates generally to a serial encoder for high data rate serial communication links. More particularly, the invention relates to a double data rate serial encoder for Mobile Display Digital Interface (MDDI) links.
2. Background
In the field of interconnect technologies, demand for ever increasing data rates, especially as related to video presentations, continues to grow.
The Mobile Display Digital Interface (MDDI) is a cost-effective, low power consumption, transfer mechanism that enables very-high-speed data transfer over a short-range communication link between a host and a client. MDDI requires a minimum of just four wires plus power for bi-directional data transfer that delivers a maximum bandwidth of up to 3.2 Gbits per second.
In one application, MDDI increases reliability and decreases power consumption in clamshell phones by significantly reducing the number of wires that run across a handset's hinge to interconnect the digital baseband controller with an LCD display and/or a camera. This reduction of wires also allows handset manufacturers to lower development costs by simplifying clamshell or sliding handset designs.
MDDI is a serial transfer protocol, and, as such, data received in parallel for transmission over an MDDI link needs to be serialized. U.S. patent application Ser. No. 11/285,397, entitled “Double Data Rate Serial Encoder”, filed Nov. 23, 2005 describes an MDDI Double Data Rate (DDR) serial encoder having a glitchless output. The glitchless output serial encoder benefits from a glitchless multiplexer, designed with a priori knowledge of a Gray code input select sequence. This a priori knowledge of the input select sequence allows for a reduction in the size of the multiplexer and, subsequently, of that of the DDR serial encoder.
However, improvements can be made in several aspects to the DDR serial encoder design described in U.S. application Ser. No. 11/285,397. In one aspect, it is noted that the glitchless multiplexer used in the DDR serial encoder described in U.S. application Ser. No. 11/285,397 remains larger in size than a non-glitchless multiplexer. In another aspect, the number of logic layers between the final register stage and the encoder output, a factor that contributes to larger output skew and lower link rate, can be significantly reduced.
What is needed therefore is an MDDI DDR serial encoder having reduced size, complexity, and output skew. What is also needed is that the MDDI DDR serial encoder has a glitchless output.